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rt8048 1 DS8048-01 june 2011 www.richtek.com pin configurations ordering information (top view) wdfn-6l 2x2 3mhz 1a step-down converter general description the rt8048 is a high-efficiency pulse-width-modulated (pwm) step-down dc/dc converter. capable of delivering 1a output current over a wide input voltage range from 2.5v to 5.5v, the rt8048 is ideally suited for portable electronic devices that are powered from 1-cell li-ion battery or from other power sources such as cellular phones, pdas and hand-held devices. two operating modes are available including : pwm/low dropout auto switch and shut-down mode. the internal synchronous rectifier with low r ds(on) dramatically reduces conduction loss at pwm mode. no external schottky diode is required in practical application. the rt8048 enters low- dropout mode when normal pwm cannot provide regulated output voltage by continuously turning on the upper p-mosfet. the rt8048 enters shut-down mode and consumes less than 0.1 a when en pin is pulled low. the switching ripple is easily smoothed-out by small package filtering elements due to a fixed operating frequency of 3mhz. features z z z z z 2.5v to 5.5v input range z z z z z 3mhz fix-frequency pwm operation z z z z z 1a output current z z z z z 90% efficiency z z z z z no schottky diode required z z z z z 0.6v reference allows low output voltage z z z z z low dropout operation : 100% duty cycle z z z z z rohs compliant and halogen free applications z portable instruments z microprocessors and dsp core supplies z cellular phones z wireless and dsl modems z pc cards marking information note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. hb : product code w : date code nc en fb/vout gnd lx vin 5 4 1 2 3 6 gnd 7 rt8048( package type qw : wdfn-6l 2x2 (w-type) lead plating system z : eco (ecological element with halogen free and pb free) - ) output voltage default : adjustable 10 : 1.0v 12 : 1.2v 15 : 1.5v 18 : 1.8v 25 : 2.5v 33 : 3.3v hbw
rt8048 2 DS8048-01 june 2011 www.richtek.com function pin description typical application circuit v out (v) l ( h) r1 (k ) r2 (k ) c out ( f) 1.2 0.47 82 82 4.7 1.8 0.47 100 49.9 4.7 2.5 1 91 28.7 4.7 3.3 1 82 18 10 table 1. recommended component selection vin lx rt8048 en fb v in v out l 6 4 3 2 r1 r2 c1 gnd 5, 7(exposed pad) c in c out figure 1. adjustable voltage regulator figure 2. fixed voltage regulator vin lx rt8048 en vout v in v out l 6 4 3 2 gnd 5, 7(exposed pad) c in c out pin no. adjustable output voltage fixed output vol ta ge pin name pin function 1 1 nc no int ernal co nne ction . 2 2 en chip enable (active high). 3 3 vin power input. 4 4 lx switch node. 5, 7 (exposed pad) 5, 7 (exposed pad) gnd ground. the exposed pad must be soldered to a large pcb and connected to gnd for maximum power dissipation. 6 -- fb feedback. -- 6 vout output voltage.
rt8048 3 DS8048-01 june 2011 www.richtek.com function block diagram comp r c r s1 r s2 en vin lx fb/vout uvlo & power good detector v ref slope compensation current sense osc & shutdown control current limit detector driver control logic pwm comparator error amplifier gnd
rt8048 4 DS8048-01 june 2011 www.richtek.com absolute maximum ratings (note 1) z supply input voltage, v in ---------------------------------------------------------------------------------------------- 6.5v z power dissipation, p d @ t a = 25 c wdfn-6l 2x2 ------------------------------------------------------------------------------------------------------------- 0.833w z package thermal resistance (note 2) wdfn-6l 2x2, ja ------------------------------------------------------------------------------------------------------- 120 c/w z lead temperature (soldering, 10 sec.) ----------------------------------------------------------------------------- 260 c z junction temperature --------------------------------------------------------------------------------------------------- 150 c z storage temperature range ------------------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm ------------------------------------------------------------------------------------------------------------------------ 2kv mm -------------------------------------------------------------------------------------------------------------------------- 200 v recommended operating conditions (note 4) z supply input voltage, v in ---------------------------------------------------------------------------------------------- 2.5v to 5.5v z junction temperature range ------------------------------------------------------------------------------------------ ? 40 c to 125 c z ambient temperature range ------------------------------------------------------------------------------------------ ? 40 c to 85 c electrical characteristics parameter symbol test conditions min typ max unit quiescent current i q -- 81 -- a reference voltage v ref 0.588 0.6 0.612 v v in rising -- 2.3 -- under voltage lockout threshold v uvlo v in falling -- 2.1 -- v shutdown current i shdn -- 0.1 1 a switching frequency f osc -- 3 -- mhz logic-high v ih 1.5 -- v in en input threshold voltage logic-low v il -- -- 0.4 v thermal shutdown temperature t sd -- 140 -- c switch on resistance, high r pfet i lx = 0.2a -- 250 -- m switch on resistance, low r nfet i lx = 0.2a -- 260 -- m peak current limit i lim -- 1.5 -- a output voltage line regulation v in = 2.5v to 5.5v -- -- 1 %/v output voltage load regulation 0ma < i load < 0.6a -- -- 1 % (v in = 3.6v, t a = 25 c unless otherwise specified)
rt8048 5 DS8048-01 june 2011 www.richtek.com note 1. stresses listed as the above ? absolute maximum ratings ? may cause permanent damage to the device. these are for stress ratings. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. note 2. ja is measured in natural convection at t a = 25 c on a high effective thermal conductivity four-layer test board of jedec 51-7 thermal measurement standard. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions.
rt8048 6 DS8048-01 june 2011 www.richtek.com efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 0.10.20.30.40.50.60.70.80.91.0 output current (a) efficiency (%) typical operating characteristics v out = 1.2v, l = 1 h v in = 3.3v v in = 5v efficiency vs. output current 0 10 20 30 40 50 60 70 80 90 100 0.10.20.30.40.50.60.70.80.91.0 output current (a) efficiency (%) v in = 5v, v out = 3.3v, l = 1 h reference voltage vs. temperature 0.580 0.585 0.590 0.595 0.600 0.605 0.610 0.615 0.620 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) frequency vs. temperature 2.5 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 -50 -25 0 25 50 75 100 125 temperature (c) frequency (mhz) 1 v in = 5v, v out = 3.3v, i out = 0.3a current limit vs. input voltage 0.5 0.8 1.1 1.4 1.7 2.0 2.3 2.6 2.53.03.54.04.55.05.5 input voltage (v) current limit (a) v out = 1.2v current limit vs. temperature 1.1 1.3 1.5 1.7 1.9 2.1 -50 -25 0 25 50 75 100 125 temperature (c) current limit (a) v in = 5v v out = 1.2 v out = 3.3
rt8048 7 DS8048-01 june 2011 www.richtek.com switching time (250ns/div) v in = 5v, v out = 1.2v, i out = 1a v out (10mv/div) i l (2a/div) v lx (5v/div) switching time (250ns/div) v out (10mv/div) i l (2a/div) v lx (5v/div) v in = 5v, v out = 3.3v, i out = 1a uvlo vs. temperature 1.5 1.8 2.1 2.4 2.7 3.0 -50 -25 0 25 50 75 100 125 temperature (c) uvlo (v) rising falling en threshold voltage vs. temperature 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 -50 -25 0 25 50 75 100 125 temperature (c) en threshold voltage (v ) rising falling output voltage vs. output current 1.18 1.19 1.20 1.21 1.22 1.23 1.24 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 output current (a) output voltage (v) v in = 5v v in = 3.3v v out = 1.2v output voltage vs. output current 3.32 3.33 3.34 3.35 3.36 3.37 3.38 3.39 3.40 3.41 3.42 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 output current (a) output voltage (v) v in = 5v, v out = 3.3v
rt8048 8 DS8048-01 june 2011 www.richtek.com power off from en time (10 s/div) v in = 5v, v out = 3.3v, i out = 1a i out (2a/div) v out (5v/div) v en (10v/div) power on from en time (100 s/div) i out (2a/div) v out (5v/div) v en (10v/div) v in = 5v, v out = 3.3v, i out = 1a load transient response time (250 s/div) v out (50mv/div) i out (0.5a/div) v in = 5v, v out = 3.3v, i out = 50ma to 1a load transient response time (250 s/div) v out (50mv/div) i out (0.5a/div) v in = 3.3v, v out = 1.2v, i out = 50ma to 1a
rt8048 9 DS8048-01 june 2011 www.richtek.com application information the basic rt8048 application circuit is shown in typical application circuit. external component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by c in and c out . although frequency as high as 3mhz are possible, the minimum on-time of the rt8048 imposes a minimum limit on the operating duty cycle. the minimum duty is equal to 70ns? f osc (hz)? 100%. inductor selection for a given input and output voltage, the inductor value and operating frequency determine the ripple current. the ripple current i l increases with higher v in and decreases with higher inductance : having a lower ripple current reduces the esr losses in the output capacitors and the output voltage ripple. highest efficiency operation is achieved at low frequency with small ripple current. this, however, requires a large inductor. a reasonable starting point for selecting the ripple current is i l = 0.4 (i max ). the largest ripple current occurs at the highest v in . to guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : out out osc l(max) in(max) vv l = 1 fi v ???? ? ???? ???? ???? inductor core selection once the value for l is known, the type of inductor can be selected. high efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or molypermalloy cores. actual core loss is independent of core size for a fixed inductor value, but it is very dependent on the inductance selected. as the inductance increases, core losses decrease. unfortunately, increased inductance requires more turns of wire and, therefore, more copper losses. ferrite designs have very low core losses and are preferred at high switching frequencies. hence, design goals should concentrate on copper loss and saturation prevention. ferrite core material saturates ? hard? , which means that the inductance collapses abruptly when the peak design current is exceeded. this result in an abrupt increase in inductor ripple current and consequent output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size, current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and don?t radiate energy, but generally cost more than powdered iron core inductors with similar characteristics. the choice of inductor type to use mainly depends on the price vs. size requirements and any radiated field/emi requirements. c in and c out selection the input capacitance, c in , is needed to filter the trapezoidal current at the source of the top mosfet. to prevent large ripple voltage, a low esr input capacitor sized for the maximum rms current should be used. rms current is given by : out out l osc in vv i = 1 fl v ?? ?? ? ?? ?? ?? ?? =? out in rms out(max) in out v v ii 1 vv this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst case condition is commonly used for design because even significant deviations do not offer much relief. note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life, which makes it advisable to either further derate the capacitor or choose a capacitor rated at a higher temperature than required. several capacitors may also be placed in parallel to meet size or height requirements in the design. the selection of c out is determined by the effective series resistance (esr) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. loop stability can be examined by viewing the load transient response as described in a later section. the output ripple, v out , is determined by : out l osc out 1 v i esr 8f c ?? ?? + ?? ?? the output ripple is highest at maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special
rt8048 10 DS8048-01 june 2011 www.richtek.com thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications of the rt8048, the maximum junction temperature is 125 c and t a is the ambient temperature. the junction to ambient thermal resistance, ja , is layout dependent. for wdfn- 6l 2x2 packages, the thermal resistance, ja , is 120 c/ w on a standard jedec 51-7 four-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (120 c/w) = 0.833w for wdfn-6l 2x2 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . for the rt8048 packages, the derating curve in figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. figure 3. derating curve for the rt8048 packages 0.00 0.10 0.20 0.30 0.40 0.50 0.60 0.70 0.80 0.90 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) four-layer pcb polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr, but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density, but it is important to only use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr but can be used in cost sensitive applications provided that consideration is given to ripple current ratings and long term reliability. ceramic capacitors have excellent low esr characteristics, but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to significant ringing. using ceramic input and output capacitors higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at the input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, vin. at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at vin large enough to damage the part. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load (esr), where esr is the effective series resistance of c out . i load also begins to charge or discharge c out , generating a feedback error signal used by the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing, which would indicate a stability problem.
rt8048 11 DS8048-01 june 2011 www.richtek.com richtek technology corporation headquarter 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 fax: (8863)5526611 information that is provided by richtek technology corporation is believed to be accurate and reliable. richtek reserves the ri ght to make any change in circuit design, specification or other related things if necessary without notice at any time. no third party intellectual property infringemen t of the applications should be guaranteed by users when integrating richtek products into any application. no legal responsibility for any said applications is assumed b y richtek. richtek technology corporation taipei office (marketing) 5f, no. 95, minchiuan road, hsintien city taipei county, taiwan, r.o.c. tel: (8862)86672399 fax: (8862)86672377 email: marketing@richtek.com outline dimension w-type 6l dfn 2x2 package dimensions in millimeters dimensions in inches symbol min max min max a 0.700 0.800 0.028 0.031 a1 0.000 0.050 0.000 0.002 a3 0.175 0.250 0.007 0.010 b 0.200 0.350 0.008 0.014 d 1.950 2.050 0.077 0.081 d2 1.000 1.450 0.039 0.057 e 1.950 2.050 0.077 0.081 e2 0.500 0.850 0.020 0.033 e 0.650 0.026 l 0.300 0.400 0.012 0.016 d 1 e a3 a a1 e b l d2 e2 see detail a 1 1 2 2 note : the configuration of the pin #1 identifier is optional, but must be located within the zone indicated. det ail a pin #1 id and tie bar mark options

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